Role Overview

Serve as a trusted technical advisor supporting the development of secure, cloud-enabled microelectronics design environments.
Provide expertise in semiconductor design methodologies, silicon IP reuse, and design ecosystem modernization.
Guide architectural decisions that support long-term scalability, interoperability, and sustainability.
Develop and validate standards for managing reusable design IP repositories.
Establish best practices for secure integration and lifecycle management of commercial and government-developed IP assets.
Assess technical risks, licensing considerations, and long-term sustainability of IP portfolios.
Support governance strategies that promote efficient IP sharing and collaboration.
Evaluate and optimize semiconductor design workflows across modern engineering environments.
Support the integration of foundry-qualified design flows and advanced packaging technologies.
Promote interoperability across multiple vendors, toolchains, and semiconductor platforms.
Identify opportunities to accelerate development timelines and improve engineering productivity.
Conduct technology evaluations and produce technical assessment reports.
Deliver recommendations related to design infrastructure, tool interoperability, and ecosystem scalability.
Support milestone reviews and provide technical briefings to program leadership and stakeholders.
Contribute to strategic roadmaps that support future program growth and modernization efforts.
Coordinate requirements and technical activities across government organizations, industry partners, research institutions, and engineering teams.
Facilitate collaboration among stakeholders focused on semiconductor design, fabrication, packaging, and testing.
Build consensus around standards, processes, and technical direction.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline
10+ years of experience in microelectronics design, semiconductor development, FPGA design, or System-on-Chip (SoC) architecture
Deep understanding of silicon IP development, integration, validation, and reuse methodologies
Experience evaluating and managing third-party intellectual property within complex hardware environments
Familiarity with industry-standard Electronic Design Automation (EDA) tools, including: Cadence, Synopsys, Siemens EDA
Understanding of cloud-enabled design environments and collaborative engineering workflows
Strong knowledge of semiconductor design processes and technology development lifecycles
Exceptional technical writing, documentation, and presentation skills
Ability to communicate complex technical concepts to both engineering teams and executive leadership.

Tech Stack

Cloud

Benefits

Paid Time Off: 15–25 days of PTO annually based on tenure, plus 11 paid holidays with no use-it-or-lose-it policy.
Retirement Benefits: Up to a 15% employer contribution to your 401(k) through a combination of company match and profit-sharing.
Comprehensive Medical Coverage: Employer-paid medical insurance for employees, with optional enhanced plans and dependent coverage available.
Dental & Vision Insurance: Employer-paid dental and vision coverage with optional buy-up plans.
Tuition Reimbursement: Up to $36,000 annually for approved degree programs, certifications, and continuing education opportunities.
Wellness & Employee Support Programs: Employee Assistance Program (EAP), wellness incentives, virtual healthcare services, prescription savings programs, and travel assistance resources.
Additional Employee Perks: Access to employee discount programs and other company-sponsored benefits.
Performance-Based Recognition: Merit increases, performance bonuses, and employee referral bonuses designed to reward contributions and success.

TAP Engineering

Open Positions (1)

Engineering

Principal Microelectronics Architect