Package Design Engineer

Role Overview

• Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal
• Package Design of critical structures for SerDes, ADC/DAC, DDR, etc.
• Schedule, prioritize, & track your work across 2+ projects simultaneously
• General flip-chip BGA package design & engineering
• Project management and customer interface for your design projects
• Contribute to efficiency improvements for the design team, through process development/improvement, automation, documentation, etc.
• Physical design (layout) is a foundational responsibility in this role

Requirements

• BSEE or similar field and 12+ years' experience in flip-chip-BGA package design, including high-speed SerDes
• MSEE or similar field and 10+ years' work experience
• Knowledge of package-level signal integrity and power integrity, to apply to package designs
• Cadence APD (allegro package designer) experience is preferred.
• Self-management and organization skills
• Preferred candidates will also have 1 or more years experience with Cadence SKILL for Allegro, or similar design-automation coding experience and interest

Tech Stack

• DAC

Benefits

• Medical, dental and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• Company paid holidays
• Paid sick leave and vacation time