Senior Power Analysis and Optimization Engineer

Role Overview

• Analyze full‑chip and unit‑level power using internal and industry‑standard RTL and gate‑level power tools, and translate data into concrete design and architectural improvements.
• Develop and productionize power‑aware models and flows, including ML/RL‑based techniques for anomaly detection, dynamic power management, and design‑space exploration.
• Design and train new LLMs that “learn the art” of power analysis from design data, power reports, bug histories, and best practices—so they can:
• Assist engineers in interpreting complex power data
• Propose likely root causes and candidate fixes
• Recommend architectural and micro‑architectural optimizations for power
• Perform comparative power analysis across workloads, products, and design options to identify trends, anomalies, and optimization opportunities that aren’t obvious from first principles alone.
• Partner closely with Architects, Performance, Software, ASIC Design, and Physical Design teams to interpret power data, root‑cause power bugs, and drive fixes and design changes.
• Prototype and evaluate new architectural features in Verilog, with a strong focus on their power and energy implications.
• Automate and scale flows (Python/Perl/C++), and define new pipelines that fast‑track power anomaly detection and close the loop between power data, AI models, and design decisions.
• Apply AI to power optimization: build and deploy data‑driven models—using machine learning, reinforcement learning, data analytics, and custom LLMs—to recommend or automatically tune power‑efficient configurations and policies.

Requirements

• MS (or equivalent experience) and 5yrs experience OR PHD + 3yr experience in EE/CE/CS or related fields.
• Strong understanding of energy consumption, power estimation, data movement, and low‑power design.
• Familiarity with Verilog and ASIC design principles, and hands‑on experience with tools such as PowerArtist, PrimePower/PrimePower RTL, RTL Architect, or similar.
• Solid coding and automation skills, preferably in Python, Perl, and C++.
• Experience or strong interest in machine learning, reinforcement learning, and data analytics, ideally applied to EDA, architecture, or system‑level optimization.
• Interest or experience in building and using LLMs or other foundation models as engineering copilots—especially for EDA/power/architecture workflows.
• Excellent communication and collaboration skills to work effectively with cross‑functional design and architecture teams.
• A genuine desire to bring data‑driven, AI‑assisted decision‑making into power architecture and help shape the energy profile of NVIDIA’s future products.

Tech Stack

• Perl
• Python

Benefits

• equity
• benefits