Design, implement, verify, and support the enablement and adoption of advanced hardware design tools, flows, and methodologies
Define comprehensive methodologies for hardware development related to technology nodes and EDA tool enabling
Create and verify unique hardware designs, assemble design platforms, and integrate components into hierarchical systems
Provide deployment coverage for end-to-end EDA tool testing on new technology nodes
Develop, test, and analyze engineering design automation tools, flows, and methodologies to improve efficiency and optimize power and performance
Support development and enhancement of platforms, databases, scripts, and tool flows for design automation
Build deep understanding of digital design, verification, structural and physical layout, fullchip integration, power and performance, clocking, and/or timing to enhance future TFM development
Collaborate with EDA vendors on defining and early testing of next-generation design tools
Requirements
Bachelor's Degree with 8+ years, OR Master's Degree with 5+ years, OR PhD with 3+ years of experience in Physics, Electrical & Computer Engineering, or related field
3+ years of experience in one of the following skill sets: LVS/Extraction Runset Development in ICV PXL or Calibre SVRF or Pegasus language StarRC or Quantus, or xACT based extraction flows, methodologies and/or certification
Scripting knowledge in TCL, Perl, or Python
2+ years of experience in Physical Verification/DRC/LVS/PEX/TVF
2+ years of working in Unix/Linux operating system environment
1+ year of experience in 3D IC Extraction (SNPS VIB, or Cadence IDX) flow