Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements
Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications
Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs
Replicates, root causes, and debugs issues in the presilicon environment
Finds and implements corrective measures to resolve failing tests
Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals
Documents test plans and drives technical reviews of plans and proofs with design and architecture teams
Maintains and improves existing functional verification infrastructure and methodology
Participates in the definition of verification infrastructure and related TFMs needed for functional design verification
Requirements
Bachelor’s degree in electronics, computer engineering or related engineering with 5+ years of experience OR Master’s degree in electronics, computer engineering or related engineering with 4+ years of experience
Test Bench bring-up at IP level and strong programming skills in System Verilog, OVM and UVM
Hands on verification experience working on ASIC, CPU or GPU
Test Plan development experience at IP level with coverage closures
Coverage driven verification testbench development functional modeling and test writing
Understanding of Graphics architecture
Experience with industry standard frontend design and verification flows, tools, methodology