Analog-mixed signal integrated circuit design using common circuit design tools from Cadence and Synopsys.
Design state of the art In-Memory-Compute engine for Artificial Intelligence Inference Accelerator and High-Speed Die-2-Die Interface for scale-out.
Job scope includes schematic circuit design, system level performance analysis, design test benches for simulations and verifications.
Guide layout engineers on layout in deep sub-micron process nodes from 4nm and below.
Optimize design and layout to achieve low power design performance over process-voltage-temperature corners and six-sigma Monte-Carlo yield analysis.
Independent minor layout tweaks when necessary.
Work with backend engineers on integration of design/layout.
Provide model of circuit for backend verification.
Participate in Evaluation Board design for silicon bring-up and bench debug or characterization.
Build scripts for silicon bring up and test features.

Completed a BS/MS/PhD Preferred degree in Electrical Engineering and BS 14+/MS 12+/PhD 10+ years of related professional experience in high-speed circuit design blocks such as Phase Interpolator, Clocking, PLL designs
Experience and knowledge of Schematic Capture, Spice Simulations and running Monte-Carlo simulations
Experience and knowledge of Circuit Layout, Extraction and running back-annotated simulations
Experience with Channel modeling using Matlab or other tools.
Participation and contribution in Standard bodies is a plus.
Must have effective interpersonal and teamwork skills.
Proficiency in working with cross functional and cross site teams.
Excellent communication skills
Demonstrates good analysis and problem-solving skills.
Must have the ability to multi-task in a fast-paced environment

Analog Design Engineer – L4/L5

Key skills