Key skills
C++CMATLABCommunication
About this role
Role Overview
- Develop channel models and run simulations to help define Serdes architecture
- Define and document signal processing block requirements, architecture, and lab test plan
- Develop bit-exact MATLAB and C/C++ system models for simulation and verification
- Develop and run system-level simulation suites of the Serdes to evaluate architectural tradeoffs
- Work with the design team to perform vector matching verification with RTL simulations
- Develop, test, and debug firmware associated with physical layer functionality
- Lab testing and debug of Serdes
- Documentation/application note development and customer support
- Support marketing group with customer meetings and collateral
Requirements
- B.S.E.E. plus 8+ years relevant experience OR M.S.E.E. plus 6 years required
- Expert knowledge in Communication Theory
- Expert knowledge in Digital Signal Processing algorithms
- Working knowledge of Analog circuit behavior
- Working knowledge of Transmission line theory and s-parameter
- Expert in MATLAB, C/C++ programming
- Good hands-on skills in the lab
- Experience in designing high-speed Clock and Data Recovery (CDR) PLLs is a very big plus
- Experience in equalization techniques for wireline communication applications such as read-channel is also a very big plus
- RTL coding is a plus
- Knowledge of IEEE 802.3/OIF 100G/200G/400G Serdes standards and PCIe Gen6/Gen7 standards is a plus
Benefits
- Medical, dental and vision plans
- 401(K) participation including company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Company paid holidays
- Paid sick leave and vacation time