Senior RFIC Layout Designer

Role Overview

• Execute high-quality layout for RF, analog, and mixed-signal blocks.
• Contribute to top-level layout integration.
• Contribute to layout strategies to meet performance targets.
• Ensure robust implementation of matching and symmetry.
• Collaborate with RF/analog designers and digital implementation teams.
• Participate in establishing layout review processes.
• Drive full-chip physical signoff.
• Own tapeout readiness and interface with foundry and EDA partners.

Requirements

• 5+ years of RF/analog/mixed-signal layout experience.
• Extensive hands-on experience with advanced FinFET process technologies (≤16nm preferred).
• Proven track record of top-level SoC layout integration and successful silicon tapeouts.
• Experience collaborating with distributed teams.
• Deep understanding of RF and analog layout techniques and device physics.
• Extensive hands-on experience with power planning and full-chip physical architecture.
• Strong proficiency with industry-standard tools.

Benefits

• Comprehensive benefits package including paid time off
• Medical/dental/vision coverage
• Life insurance
• Paid parental leave
• Equity in the company