DMTS, DRAM Architecture

Role Overview

• Define next‑generation DRAM system architectures across performance, capacity, RAS, and telemetry
• Lead cross‑stack co‑optimization spanning silicon, package, module, board, and system
• Architect advanced RAS and telemetry features and translate system needs into silicon
• Drive long‑range memory technology strategy and influence industry standards
• Serve as a senior technical interface to customers, executives, and partners

Requirements

• Bachelor’s degree or equivalent practical experience in EE, CE, CS, or related field
• Extensive hands‑on experience in DRAM or memory systems architecture
• Deep understanding of DRAM timing, signaling, power, and reliability mechanisms
• Proven ability to translate system requirements into silicon architecture
• Master’s degree or PhD in a related technical field (preferred)
• Recognized technical leadership influencing multiple products or teams (preferred)
• Experience engaging tier‑1 customers and ecosystem partners (preferred)
• History of architectural innovations adopted into production (preferred)

Benefits

• Health insurance
• Dental and vision plans
• Paid family leave
• Robust paid time-off program
• Paid holidays
• Programs protecting income if unable to work due to illness or injury