Development and deployment of Calibre decks for advanced FINFET/GAA/HV nodes
Definition of tool acceptance and certification criteria in partnership with Broadcom teams, Foundry and EDA vendors to meet high-performance IP design needs
Definition and development of IP test-cases and basic test-structures to validate tools and technology related updates on predictable schedules
Development of software for automation in Skill, PERL, UNIX shell scripting and tool-flow integration
Creation of documentation and hands-on training for AMS Design & Layout engineers as needed
Tracking and resolution of tool and technology file issues with hands-on management per objectives of Foundry and EDA vendor support teams
Monitoring of EDA industry trends and new capabilities by attending conferences and research forums
Engagement with EDA and Foundry R&D teams on advanced node capability roadmaps
Identification of new tools, development of evaluation criteria and processes and then serving as champion for introduction and usage within the Broadcom design community.

Masters in Electrical Engineering or Computer Science plus 10+ years of EDA experience
User level familiarity with related CAD Tools: Calibre, Virtuoso Layout & Schematics, Quantus QRC/StarRC/QuickCap/Raphael, and simulation using SPECTRE/HSPICE
Solid background in programming skills, basic layout design, and technology knowledge to help solve layout, physical verification, and post-layout extraction challenges and problems
Experience in all phases of CAD tools from evaluation, QA, test, release, and user support to documentation
Expertise in Cadence Skill, PERL, UNIX Shell and utilities
Excellent interpersonal, communication, and presentation skills, along with strong multi-tasking skills, attention to detail, and the ability to work well in a team.

IC CAD Engineer

Key skills