Define the end-to-end architecture for AI platforms, from node-level design to rack-scale composable systems
Drive adoption of PCIe/UAlink-based fabrics for disaggregated compute, memory, and accelerator scalability
Architect solutions for GPU/accelerator-dense systems optimized for AI training and inference workloads
Lead integration of connectivity solutions — retimers, switches, and fabric controllers — aligned with Astera Labs' product ecosystem
Lead system architecture and design for high-performance compute platforms optimized for AI and accelerator-driven workloads
Define and implement GPU-enabled server platforms for AI training, inference, and HPC workloads
Define the technical vision and multi-year product roadmap for AI infrastructure platforms.

Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field
15+ years of experience in system architecture, server firmware, or platform engineering
Deep expertise in server BIOS/UEFI, OpenBMC and BMC firmware stacks, and Redfish or datacenter management frameworks
Strong knowledge of PCIe architecture and performance optimization (Gen4/5/6)
Experience with CPU, memory, and system-level performance tuning for high-performance computing or AI platforms
Strong programming experience in C/C++ and low-level system software
Proven track record of leading cross-functional, large-scale architecture initiatives.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Distinguished Engineer – System & Rack Hardware Architecture

Key skills