Conduct formal verification of IP and SoC microarchitectures using advanced tools and methodologies based on model checking and equivalence checking algorithms.
Develop comprehensive formal verification test and coverage plans, defining scope, strategy, and techniques to ensure thorough verification.
Create abstraction models to achieve convergence on design and track, verify, and apply abstraction techniques effectively.
Develop formal proofs to implement verification plans and resolve failing tests using corrective measures.
Collaborate with architects, RTL developers, and physical design teams to verify and enhance complex architectural and microarchitectural features.
Document test plans and lead technical reviews with design and architecture teams, ensuring alignment and robust verification strategies.
Maintain and improve existing functional verification infrastructure and methodologies for future scalability.
Apply expertise in binary decision diagrams (BDD), data flow graphs (DFG), and modeling architecture to simplify complex problems and formally prove protocols and architectures.

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related specialized field with 1+ years of experience OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related specialized field with: 1+ years of experience in formal verification
Proficiency in formal verification tools (Jasper) and methodologies, including model checking and equivalence checking algorithms.
Strong grasp of abstraction techniques, convergence methodologies, and simulation techniques.
Knowledge of binary decision diagrams (BDD) and data flow graphs (DFG) for data path analysis.

CPU Formal Verification Engineer

Key skills