SoC Logic Design Engineer

Role Overview

• Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design
• Integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design
• Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation
• Works with IP providers to integrate and validate IPs at the SoC level

Requirements

• Bachelor's degree in Electrical/Computer Engineering or related STEM field with 4 years or more relevant experience
• OR Master's degree in Electrical/Computer Engineering or related STEM field with 3 years or more relevant experience
• SOC or Subsystem RTL design and integration using Verilog/SystemVerilog
• IP RTL design using Verilog/SystemVerilog

Benefits

• competitive pay
• stock bonuses
• health
• retirement
• vacation