Drive the definition and architecture of complex mixed-signal ICs and SDR chips, with a focus on digital accelerators and subsystems.
Work closely with analog, RF, firmware, and software teams to ensure cohesive SoC and system-level design.
Capture and maintain stakeholder requirements and ensure the development teams remained aligned throughout the program.
Support the successful execution of IC development programs from concept through tape-out and validation.
Foster a culture of technical excellence and continuous learning.
Support the development of team members through mentoring and engagement.
Stay ahead of industry trends and emerging technologies to guide architectural decisions and maintain competitive advantage.
Work with Customers, Ecosystem Partners, and ADI stakeholders to define future SDR technologies.

10+ years of experience, including 5 years of digital IC design.
Expertise in digital signal processing, RTL design, and digital architecture.
Strong knowledge of:
Firmware and embedded software
Radio architecture and signal chains
Microprocessor subsystems and digital accelerators
DSP cores and custom compute architecture
Hardware/Software Co-Design and Digital Modelling
Experience with system-level modeling and simulation (e.g., MATLAB, SystemVerilog, Python).
Working understanding of signal processing for High-speed ADCs/DACs
SerDes and high-speed interfaces
Demonstrated ability of requirements capture and documentation.
Familiarity with SoC integration and verification methodologies.
Exposure to productization and manufacturing ICs in high-volume.
Strong written and verbal communication skills.

Staff Engineer – Digital ASIC and Signal Processing Chip Architect

Key skills