Lead a team of full-time and contract senior layout designers.
Assess schedules, floor plans, and risks for analog macros.
Perform hands-on work at the macro level layout.
Manage and track layout schedules; hire additional designers as needed.
Assess risks and plan workarounds to meet or exceed layout schedules.
Identify and prioritize project tasks and risks.
Work with CAD, tech, and circuit design teams to synchronize layout schedules with overall project plans.
Understand complex layout design concepts and communicate issues cross-functionally.

Minimum 10+ years in analog layout design and 3+ years in management.
Deep understanding of layout methodology from initial chip planning to tape-out.
Experience with advanced process technology and FinFET is preferable.
High proficiency in LVS, DRC debugging, and interpreting Calibre DRC, ERC, LVS reports.
Proficient in Synopsys or Cadence layout entry tools; programming skills in Skill, TCL, or Perl are a plus.
Strong technical and analytical background with excellent problem-solving skills.
Excellent verbal and written communication skills; experience in conflict resolution and consensus building.
Proven ability to build and develop a world-class analog layout team; proactive, self-starter with strong organizational skills.

Analog Layout Manager

Key skills