Mixed Signal Logic Design Engineer

Role Overview

• As a Mixed Signal Logic Design Engineer, you will play a pivotal role in shaping the future of high-speed and mixed signal IP designs at Intel.
• Your contributions will directly impact the development of cutting-edge technologies that enable the integration of functional units, IP blocks, and subsystems into full chip designs.
• This position is at the forefront of innovation, requiring collaboration with cross-functional teams to define architecture and microarchitecture features, optimize performance, and ensure design integrity.
• Your work will drive Intel's success in achieving power, performance, and area goals, empowering our customers with industry-leading solutions.

Requirements

• BS degree in Electrical Engineering or Computer Engineering or similar field of study with 4+ years relevant experience -OR
• MS degree in Electrical Engineering or Computer Engineering or similar field of study with 3+ years relevant experience.
• Experience with standard digital design concepts such as FSM design techniques
• Experience with SystemVerilog
• Experience with computer architecture, analog design, ADC/DAC designs, communications theory, and/or microarchitecture design concepts
• Experience producing high-level architecture that meets internal and industry-standard specifications.
• Comfortable working with a high level of independence.
• Experience with multiple clock-domain design
• Preferred Qualifications: BS degree in Electrical Engineering or Computer Engineering or similar field of study with 10+ years relevant experience -OR
• MS degree in Electrical Engineering or Computer Engineering or similar field of study with 8+ years relevant experience.
• Able to work highly independently, guide other junior team members and make contributions that increase the productivity of the entire design team
• Excellent communication and interpersonal skills
• Experience with both logic and analog circuits as well as with analog behavioral modeling
• Knowledge of mixed-signal validation, signal and systems analysis
• Knowledge of High-Speed I/O protocol stacks (UCIe, PCIe, USB, etc.)
• Experience with scripting languages e.g. Perl, bash/csh and Python is highly desirable
• Proven record of coordinating/guiding other designers to deliver large complex logic blocks
• Experience using RTL quality tools such as linting and CDC analysis and supporting team adoption and usage
• Experience with low-power design, power gating and multiple power-domain design
• Experience with writing, testing, packaging and releasing firmware
• Experience writing, testing and supporting front-end automation and packaging flows
• Experience using AI tools as a productivity booster in all aspects of the IP design process
• Strong analytical debugging skills, with a creative approach to problem-solving.

Tech Stack

• DAC
• Perl
• Python

Benefits

• We offer a total compensation package that ranks among the best in the industry.
• It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.