Key skills
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About this role
Role Overview
- Analyze architectural requirements and perform trade-off analysis for implementation
- Deliver high performance, area and power efficient RTL Blocks
- Craft micro-architecture specification and implement in high-quality RTL
- Deliver fully verified, synthesizable and timing clean blocks
- Collaborate with chip architects, verification engineers, and SoC integration engineers to meet goals
- Identify potential IP solutions for specific use cases
Requirements
- Bachelors or Master's Degree, or equivalent experience in Electrical Engineering or Computer Engineering
- 5+ years of relevant work experience
- Experience working with high-speed connectivity protocols such as NVLink, PCI-Express, Ethernet, UCIE etc.
- Proven track record of delivering high bandwidth datapath blocks such as data movers, protocol adaptors, network-on-chip, arbiters and schedulers etc.
- Deep understanding of ASIC design flows and methodology
- Strong analytical and interpersonal skills, excellent teammate
Benefits
- Highly competitive salaries
- Comprehensive benefits package