Lead design bring-up and validation for Ethernet IPs across speeds including features such as Auto-Negotiation/Link Training (AN/LT) and IEEE 1588 Precision Time Protocol (PTP)
Act as the primary technical interface for customers, supporting debugging, issue resolution, and performance optimization
Highlight Ethernet IP use models and demonstrate performance metrics
Create high-quality technical collateral including User guides, Reference designs, Technology demonstrations and validation tools
Collaborate closely with cross-functional teams (Design, Validation, Product Engineering, and Sales) to reproduce and debug customer issues
Requirements
Minimum 5 to 7 years’ experience
Bachelor’s degree or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
Hands-on programming experience in one or more of the following: VHDL, Verilog, C/C++, Python, Perl, or TCL