Arithmetic Formal Verification Engineer

Role Overview

• Develop and execute formal verification strategies specifically targeting arithmetic logic units (ALUs), floating-point units (FPUs), dividers, multipliers, and custom math blocks
• Develop formal verification testbenches and properties for arithmetic hardware designs
• Collaborate with RTL designers to understand microarchitectural details and identify verification targets
• Write and debug formal arithmetic specifications
• Use formal tools (e.g., JasperGold, VC Formal, OneSpin) to prove correctness or find corner-case bugs
• Analyze counterexamples and work with design teams to resolve issues
• Contribute to the development of verification methodologies and best practices
• Document verification plans, results, and coverage metrics

Requirements

• B.S. in Computer Engineering/Electrical Engineering or any STEM Degree with 6+ years of experience
• M.S. in Computer Engineering/Electrical Engineering or any STEM Degree with 4+ years of experience
• PhD in Computer Engineering/Electrical Engineering or any STEM Degree with 6+ months of experience
• Strong understanding of digital design fundamentals, especially arithmetic circuits (e.g., adders, multipliers, dividers, floating-point units)
• Hands on experience with industry standard formal verification tools such as JasperGold, Questa Formal, VC Formal
• Experience with formal abstractions and other complexity reduction techniques
• Experience with a hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools
• Experience in assertion writing, checker development, coverage analysis, failure debug, root cause analysis

Benefits

• Flexible work arrangements
• Professional development