Senior Technical Staff Engineer – Emulation

Role Overview

• Architect Veloce RTL models and UVM-acceleration for EdgeAI, PCIe, Ethernet, DDRC, etc.
• Build CAD execution flows, develop high-fidelity emulation models, Veloce XACTORs, and system-level use cases to drive deep performance and architectural validation on emulation platforms
• Engineer shift-left, end-to-end solution development by integrating hard and soft IP RTL with bare-metal firmware on emulation systems
• Develop system bring-up frameworks, debug complex RTL/firmware issues, and accelerate time-to-market through comprehensive hardware-software co-validation
• Provide technical feedback to Silicon Engineering, Software Engineering, and Marketing to enhance future product roadmaps
• Provide expert pre
• and post-sales design support to customers and sales forces

Requirements

• BSEE / MSEE or equivalent technical degree
• A minimum of 10+ years of progressive experience in hardware emulation, RTL design, FPGA methodologies, or HW/SW co-verification
• Strong proficiency with Veloce platforms, VirtuaLAB environments, UVM-acceleration, and SystemC-DPI testing methodologies
• Proficient in Verilog, System Verilog, C/C++, RTL synthesis concepts
• Deep understanding of high-speed IPs including PCIe, Ethernet, DDR3/4/5/, AMBA AHB/APB, SERDES, and USB
• Strong foundation in DSP theory/processor architectures and embedded processors (e.g., ARM Cortex platforms) is highly desirable
• Strong analytical and problem-solving skills with a proven ability to debug complex, full-stack hardware-software issues and drive them to closure
• Excellent written and verbal communication skills for authoring documentation, training modules, and presenting to executive customers

Benefits

• Commitment to employee development
• Values-based decision making
• Strong sense of community
• Opportunities for career growth