Collabera is a company seeking a CAD Engineer for a six-month contract with possible extension. The role focuses on physical design and EDA engineering in semiconductor chip development, involving tasks such as modifying PnR infrastructure and automating design experiments.
Responsibilities:
- Physical Design / EDA engineering role focused on Place & Route (PnR) and Design-Technology Co-Optimization (DTCO) in semiconductor chip development
- Build and customize chip layout flows adapting standard Place & Route processes to explore better performance, power, and area tradeoffs with new process technologies
- Modify core PnR infrastructure tuning libraries, tech files, and tool settings so designs work optimally with new nodes or device architectures
- Automate runs and experiments writing scripts (mostly Tcl) to run large numbers of design experiments efficiently
- Own and support PnR flows maintaining, validating, and distributing these flows to the DTCO team and ensuring everything works smoothly
- This is a hands-on chip physical design infrastructure role, bridging EDA tools, silicon process tech, and design optimization usually found at advanced semiconductor companies (Intel, TSMC, AMD, NVIDIA, etc.)
Requirements:
- Physical Design / EDA engineering role focused on Place & Route (PnR) and Design-Technology Co-Optimization (DTCO) in semiconductor chip development
- Build and customize chip layout flows adapting standard Place & Route processes to explore better performance, power, and area tradeoffs with new process technologies
- Modify core PnR infrastructure tuning libraries, tech files, and tool settings so designs work optimally with new nodes or device architectures
- Automate runs and experiments writing scripts (mostly Tcl) to run large numbers of design experiments efficiently
- Own and support PnR flows maintaining, validating, and distributing these flows to the DTCO team and ensuring everything works smoothly
- This is a hands-on chip physical design infrastructure role, bridging EDA tools, silicon process tech, and design optimization usually found at advanced semiconductor companies (Intel, TSMC, AMD, NVIDIA, etc.)