Encore Semi, Inc. is seeking a Senior DFT Engineer to architect and implement advanced test solutions. This role focuses on high-level customization of Siemens Tessent flows, requiring deep expertise in ICL/PDL development for non-standard test sequences.
Responsibilities:
- Custom Test Sequences: Author and edit ICL/PDL to support unique hardware instruments and complex IP
- Tessent Integration: Drive DFT insertion and pattern generation using the Tessent Shell environment
- Pattern Engineering: Develop custom ATPG patterns and perform gate-level simulations (GLS) to ensure high test coverage
- Silicon Debug: Support post-silicon bring-up and failure analysis using custom-engineered test sequences
Requirements:
- Expert-level experience with the Siemens Tessent tool suite
- Proven ability to customize PDL/ICL for non-standard test delivery
- Strong background in Scan, ATPG, JTAG, and Hierarchical DFT
- Proficiency in Tcl/Python for flow automation
- 5+ years of experience with a track record of successful tape-outs