Encore Semi, Inc. is seeking a Sr ASIC Packaging Engineer to lead the physical architecture of high-performance silicon. The role involves optimizing the silicon-to-board interface and ensuring advanced ASIC designs meet stringent requirements through simulation and innovative manufacturing.
Responsibilities:
- EM & Signal Integrity: Lead full-wave 3D electromagnetic simulations using ANSYS HFSS for ASIC package extractions. Optimize bump-to-ball transitions and high-speed SerDes paths using Agilent ADS
- Package Architecture: Design and develop advanced ASIC packaging solutions, including 2.5D/3D IC (HBM/CoWoS), Flip-Chip BGA, and Fan-Out Wafer-Level Packaging (FOWLP)
- Integration & Test (I&T): Drive the Integration and Test phase by correlating simulation models with physical hardware measurements (VNA/TDR). Validate package-level power delivery networks (PDN)
- Prototyping & Additive: Utilize Additive Manufacturing to develop custom heat sinks, interposers, or rapid-prototype substrates, reducing the R&D cycle for complex ASIC form factors
Requirements:
- 10+ years in Electronics Packaging, specifically focused on high-bump-count ASICs and high-speed interfaces
- Expert proficiency in ANSYS HFSS and Agilent ADS for package-level SI/PI analysis
- Deep understanding of substrate materials (ABF, Coreless), thermal interface materials (TIMs), and underfill chemistry
- B.S./M.S. in Electrical Engineering, Mechanical Engineering, or Materials Science