Key skills
PythonC++CAgilePrototyping
About this role
Meta’s Silicon Engineers are at the forefront of innovation, driving the design and development of silicon that power the future of human connection. Across Infrastructure, Reality Labs, and Research, our teams tackle complex challenges in wearables, data centers, and more. We bring together cross-disciplinary minds to invent, prototype, and deliver products and platforms that connect billions of people worldwide.
As an engineer on our team, you will be responsible for designing, developing, and validating complex silicon systems, including ASICs and SoCs. You will work closely with cross-functional teams to ensure the delivery of high-quality silicon solutions that meet the needs of our customers.
Responsibilities
Assist in the development, execution, and sign-off of SoC and end-to-end system validation plans
* Identify and communicate technical risks related to the project to stakeholders under guidance
* Participate in silicon bring-up and validation activities
* Understand system HW/SW/FW components as a whole and assist in driving test execution and debug with cross-functional teams
* Collaborate with the team for lab debug, silicon bug repro, failure analysis, and failure report activities
* Work with cross-functional teams to generate validation reports for SoC and systems
* Adapt to changing roadmaps and validation plans based on changes in an agile environment
* Develop emulation testbenches, deliver emulation and prototyping models, and build and execute emulation test plans
* Drive emulation methodologies for HW verification and SW development
* Bring up and debug interfaces such as PCIe, etc
* Develop emulation validation components for validation efficiency in testing, debug, and automation
Qualifications
Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
* 2+ years of hands-on experience in bring-up, debug, and validation of complex SoCs
* Experience in high-speed protocols (e.g., MIPI, PCIe, USB, DDR) and hands-on experience in high-speed IO bring-up
* Experience in silicon validation planning, execution, validation FW development, and validation sign-off
* Experience using lab equipment, such as scopes, BERTs, protocol analyzers, JTAG debuggers, etc
* Experience with building silicon validation infrastructure and test automation, in highly cross-functional environments - across multiple team sites 2+ years track record of delivering emulation/prototyping models from RTL onto industry-standard platforms (e.g., Synopsys/ZeBu, Cadence Palladium/Protium, Siemens/Veloce)
* 2+ years of experience developing compilation/build flows, including experience building emulator models from scratch and troubleshooting build/compile issues
* Proficiency in developing emulation testbenches in SystemVerilog and/or C/C++, including transactors and model integration
* Background working on emulation methodology to accelerate both hardware verification and software development (e.g., enabling SW bring-up on emulation)
* Bring-up and debug experience on complex SoCs implemented in pre-silicon, including high-speed interfaces such as PCIe and DDR, plus common SoC interconnect/peripheral interfaces
* Experience developing validation components and automation to improve emulation debug/efficiency (e.g., checkers, monitors, performance tooling), including scripting in Python and/or Tcl
* Experience architecting emulation systems across scales, from IP blocks to full SoCs to multi-chip systems, including managing multiple design drops/releases
* Experience creating and executing emulation test plans, with a track record of improving model quality and enabling pre-silicon validation
* Demonstrated experience building emulation tools, workflows, and infrastructure, partnering effectively with RTL, verification, validation, and software teams
* History of “first-pass success” and effective debug closure across pre- and post-silicon, including reproducing/triaging silicon issues on an emulator and partnering with EDA vendors to resolve tool/platform issues
As an engineer on our team, you will be responsible for designing, developing, and validating complex silicon systems, including ASICs and SoCs. You will work closely with cross-functional teams to ensure the delivery of high-quality silicon solutions that meet the needs of our customers.
Responsibilities
Assist in the development, execution, and sign-off of SoC and end-to-end system validation plans
* Identify and communicate technical risks related to the project to stakeholders under guidance
* Participate in silicon bring-up and validation activities
* Understand system HW/SW/FW components as a whole and assist in driving test execution and debug with cross-functional teams
* Collaborate with the team for lab debug, silicon bug repro, failure analysis, and failure report activities
* Work with cross-functional teams to generate validation reports for SoC and systems
* Adapt to changing roadmaps and validation plans based on changes in an agile environment
* Develop emulation testbenches, deliver emulation and prototyping models, and build and execute emulation test plans
* Drive emulation methodologies for HW verification and SW development
* Bring up and debug interfaces such as PCIe, etc
* Develop emulation validation components for validation efficiency in testing, debug, and automation
Qualifications
Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
* 2+ years of hands-on experience in bring-up, debug, and validation of complex SoCs
* Experience in high-speed protocols (e.g., MIPI, PCIe, USB, DDR) and hands-on experience in high-speed IO bring-up
* Experience in silicon validation planning, execution, validation FW development, and validation sign-off
* Experience using lab equipment, such as scopes, BERTs, protocol analyzers, JTAG debuggers, etc
* Experience with building silicon validation infrastructure and test automation, in highly cross-functional environments - across multiple team sites 2+ years track record of delivering emulation/prototyping models from RTL onto industry-standard platforms (e.g., Synopsys/ZeBu, Cadence Palladium/Protium, Siemens/Veloce)
* 2+ years of experience developing compilation/build flows, including experience building emulator models from scratch and troubleshooting build/compile issues
* Proficiency in developing emulation testbenches in SystemVerilog and/or C/C++, including transactors and model integration
* Background working on emulation methodology to accelerate both hardware verification and software development (e.g., enabling SW bring-up on emulation)
* Bring-up and debug experience on complex SoCs implemented in pre-silicon, including high-speed interfaces such as PCIe and DDR, plus common SoC interconnect/peripheral interfaces
* Experience developing validation components and automation to improve emulation debug/efficiency (e.g., checkers, monitors, performance tooling), including scripting in Python and/or Tcl
* Experience architecting emulation systems across scales, from IP blocks to full SoCs to multi-chip systems, including managing multiple design drops/releases
* Experience creating and executing emulation test plans, with a track record of improving model quality and enabling pre-silicon validation
* Demonstrated experience building emulation tools, workflows, and infrastructure, partnering effectively with RTL, verification, validation, and software teams
* History of “first-pass success” and effective debug closure across pre- and post-silicon, including reproducing/triaging silicon issues on an emulator and partnering with EDA vendors to resolve tool/platform issues