NPU Architect

SEMRON is redefining what's possible in AI hardware, and they are seeking an NPU Architect to design the next iteration of their 3D in-memory compute chip. The role involves collaborating with a team to optimize ML workloads and guiding the evolution of next-generation architectures.

Responsibilities:

• Design and specify the structure and internal organisation of core architecture modules, aligned with workload requirements and software deployment processes
• Partner with the software team to evaluate module performance and efficiency for key workloads, uncover performance constraints, and inform architectural choices
• Monitor emerging trends and research in AI workloads, hardware architectures, and applications to guide the evolution of next-generation architectures