Dry Etch Process Develop Engineer

Micron Technology is a world leader in innovating memory and storage solutions. As a Dry Etch Process Engineer, you will develop, integrate, and optimize plasma etch processes for next-generation memory devices, collaborating with various teams to transition processes from R&D to high-volume manufacturing.

Responsibilities:

• Develop, qualify, and sustain dry etch (plasma) unit processes for advanced memory technologies (e.g., dielectric, conductor, and hardmask etch)
• Optimize critical process metrics including CD control, etch profile/anisotropy, selectivity, microloading, uniformity, and line edge/line width roughness
• Drive defect reduction and yield improvement using inline/out-of-line metrology, DOEs, SPC, and statistical data analysis
• Perform root-cause analysis and implement corrective actions for process excursions, tool health issues, and integration-related failures
• Partner with equipment vendors on chamber matching, hardware and recipe development, new capability evaluations, and cost-of-ownership improvements
• Document process baselines, change controls, and learning; communicate results and support technology transfer to high-volume manufacturing

Requirements:

• M.S. or Ph.D. in Electrical Engineering, Materials Science, Physics, Chemistry, Chemical Engineering, Mechanical Engineering, or a related engineering/technical field relevant to plasma processing and semiconductor manufacturing
• B.S. with 3+ years of semiconductor processing experience with emphasis on dry etch/plasma etch will also be considered
• Experience in semiconductor process development or sustaining engineering, including DOE planning/execution and statistical data analysis
• Working knowledge of plasma etch fundamentals, chamber hardware, and process characterization (profile, CD, selectivity, uniformity, defectivity)
• Ability to collaborate effectively across cross-functional technical teams and communicate results clearly
• Hands-on experience with advanced dry etch platforms (e.g., ICP/RIE) and chamber matching across fleets
• Familiarity with pattern transfer challenges (ARDE, microloading, footing/notching) and integration with lithography/hardmask stacks
• Experience with defect characterization techniques and tool health monitoring methodologies
• Experience working with semiconductor equipment vendors, joint development programs, or R&D environments
• Familiarity with technology transfer to high-volume manufacturing and sustaining support in a fab environment