Correct Designs is a company that provides long-term stability and benefits for verification engineers. They are seeking talented Verification Engineers with System Verilog UVM experience to verify advanced CPU/GPU based SOCs and work on projects related to AI and Machine Learning.
Responsibilities:
- Verify complex design blocks using equally complex SV/UVM verification environments
- Develop and execute pre-silicon verification test plans
- Develop directed and random verification tests to validate block and IP functionality
- Develop verification components and tools
- Develop verification functional coverage using industry standard coverage analysis tools/methods
- Debug regression fails
- Replicate functional issues found in external environments or post-silicon; review/enhance tests to verify bug fixes
Requirements:
- 3 or more years of proven verification experience in a hardware development setting
- Strong background in SystemVerilog and UVM verification methodologies
- Strong debug skills and experience with debug tools such as DVE/Verdi
- Proficiency in Object Oriented programming, computer architecture and data structures
- Strong analytical/problem solving skills and pronounced attention to details
- Strong interpersonal and communication skills
- Must be comfortable working across geographies
- Bachelor or Master's in Electrical Engineering, Computer Engineering, or Computer Science
- Experience architecting/developing verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar
- Experience in other related domains such as formal verification, RTL design, or software development