BSP Development Engineer

New York Technology Partners is seeking a BSP Development Engineer to join an exciting long-term project focused on embedded graphics and multi-core processor platforms. The role involves GPU driver development and requires expertise in embedded graphics development using OpenGL and knowledge of multi-core processing concepts.

Responsibilities:

• Embedded graphics development experience using OpenGL
• Epic Deos experience - preferred
• Multi-Core Processor Architecture (General Understanding)
• Strong fundamentals of multi-core processing concepts and system-level behavior
• In-depth knowledge of shared memory access across multiple cores, including GPU interaction:
• Memory Controller design and operation
• Cache memory hierarchy (L1, L2, L3, etc.)
• Main memory systems (e.g., DDR)
• Understanding of monitoring mechanisms for shared resource usage, including:
• Performance counters
• Quality of Service (QoS) mechanisms
• Techniques for Worst-Case Execution Time (WCET) computation
• WCET Analysis with Interference Considerations
• Capability to analyze WCET under the influence of various interference channels such as:
• I/O subsystems
• GPU
• SSD
• FPGA
• Other shared resources
• Practical knowledge of DEOS (or equivalent RTOS), with a focus on:
• Cache partitioning techniques
• Resource isolation and management
• Familiarity with AC 20-193 (FAA guidance on multi-core processor certification) is a strong advantage
• GPU driver development
• Embedded graphics development experience using OpenGL
• Epic Deos experience

Requirements:

• Embedded graphics development experience using OpenGL
• Multi-Core Processor Architecture (General Understanding)
• Strong fundamentals of multi-core processing concepts and system-level behavior
• In-depth knowledge of shared memory access across multiple cores, including GPU interaction
• Memory Controller design and operation
• Cache memory hierarchy (L1, L2, L3, etc.)
• Main memory systems (e.g., DDR)
• Understanding of monitoring mechanisms for shared resource usage, including performance counters
• Quality of Service (QoS) mechanisms
• Techniques for Worst-Case Execution Time (WCET) computation
• Capability to analyze WCET under the influence of various interference channels such as I/O subsystems, GPU, SSD, FPGA, and other shared resources
• Practical knowledge of DEOS (or equivalent RTOS), with a focus on cache partitioning techniques and resource isolation and management
• Familiarity with AC 20-193 (FAA guidance on multi-core processor certification) is a strong advantage
• Epic Deos experience