Validation Engineer

Location: Cupertino, CA and Austin TX

Experience: 5+ Years

Seekiing- Post-Validation Engineer with experince in knowledge of the full validation lifecycle from RTL simulation (SystemVerilog/UVM, VCS, Questa, Xcelium) and emulation (Palladium, Zebu, Veloce) through silicon failure analysis and debug.

As a Senior Validation Engineer on our Machine Learning Acceleration team to work from early design validation through emulation, silicon bring-up, post-silicon validation, and ongoing support of production systems deployed in AWS data centers. You'll collaborate deeply with architecture, RTL design, design verification, firmware, and software teams to ensure our next-generation AI/ML accelerators meet the highest standards of quality and performance. This role requires bridging multiple domains and broad scope of impact from low-level hardware interfaces to high-level ML workloads to deliver exceptional results.