Location: San Jose, CA
Experience: 10+ Years
Job Type: Contract / Long-Term
We are seeking a Verification Lead / Principal Verification Engineer with strong hands-on experience in PCIe Gen5/Gen6 verification to lead end-to-end verification of PCIe Controller and Subsystem IP.
The ideal candidate will have deep expertise in PCIe protocol, UVM, SystemVerilog, LTSSM, PIPE, PHY/SerDes, assertions, coverage closure, emulation, and protocol compliance.
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Electronics Engineering, or related field.
To Apply: Please send your updated resume to .