Technical Lead (TL) – Platform
Development (Marvell Silicon / Forwarding Layer)
Location: San Jose
Experience Level: 10+ Years
Role Overview
As a Technical Lead for Platform
Development focusing on Marvell Silicon, you will lead the forwarding
plane development and driver/SDK integration for ArcOS. You will architect
high-density forwarding pipelines optimized for AI clusters, data center
leaf/spine fabrics, and next-generation service provider infrastructure.
Key Responsibilities
and write microservices-based forwarding drivers that map abstract
routing/switching instructions into Marvell switch ASIC pipelines.
Integrate Marvell SDKs (CPSS, SAI, or Teralynx SDKs) to manage ASIC
lookups, ACLs, forwarding tables, and link management.
Implement hardware-assisted traffic management features such as telemetry
(INT), telemetry-driven load balancing, and congestion notification for
high-density AI fabric environments.
(DPAL) for seamless portability to Marvell silicon variants.
Collaborate with control plane, system test, and product management teams
to deliver carrier-grade stability and line-rate performance.
Technical Requirements
experience in datapath forwarding, hardware platform development, and
vendor SDK integration.
Extensive experience programming and debugging Marvell switch silicon:
Suite) or SAI abstractions.
hyperscale and AI data center fabrics.
Mastery of C and C++ programming for hardware-level, thread-safe,
multi-core system environments.
expertise in packet parsing pipelines, exact-match and LPM lookups, ACLs,
telemetry (In-band Network Telemetry/INT), and buffer management.
knowledge of L2/L3 protocols (BGP-EVPN, VXLAN, MPLS, Segment Routing/SRv6)
and how control plane states map to hardware tables.
foundation in Linux kernel drivers, user-space networking (DPDK/SAI), PCIe
access, and memory-mapped I/O (MMIO).
