Senior Software Engineer- AI for RTL Design & Formal Verification

Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions for modern AI and cloud data centers. The Senior Software Engineer will develop and deploy AI-driven applications and agents that accelerate RTL, physical and analog design, static analysis, and formal verification workflows. The role also involves building engineering assistants, databases, dashboards, and AI-assisted tooling in collaboration with RTL design, DV, formal verification, and CAD/EDA teams.

Responsibilities:

• Design, develop, and deploy AI applications using LLMs, agentic frameworks, and related technologies to support RTL, physical and analog design, static/lint checking, and formal verification flows
• Build infrastructure to deploy LLM-powered engineering assistants and multi-turn dialogue systems that help designers and verification engineers debug faster and close coverage sooner
• Develop agentic AI solutions for tasks such as RTL rule and lint checking, RTL optimization, bug triage, formal proof convergence, and static verification report analysis; fine-tune and integrate these solutions with existing CAD/EDA flows
• Build and maintain design databases and dashboards that combine agentic and deterministic retrieval to surface relevant engineering data and speed up design closure
• Collaborate closely with RTL design, DV, formal verification, and CAD/EDA teams to understand pain points and translate them into AI-assisted tooling