Senior Hardware Engineer - AI & Server Compute Design

Hyve Solutions transforms complex engineering challenges into production reality for innovators building AI, cloud, and connected infrastructure. The Senior Hardware Engineer will lead board- and system-level design for GPU head nodes and compute servers, translate requirements into platform architectures, and drive products through validation, manufacturing ramp, and deployment. The role also provides technical leadership, mentorship, and complex root-cause debugging across hardware, firmware, and system integration.

Responsibilities:

• Lead board- and system-level hardware design. Own schematic design, layout direction, component selection, and board bring-up for GPU head nodes and compute servers, including power delivery, high-speed signaling, and management subsystems
• Translate requirements into architecture. Partner directly with Hyperscalers to convert system-level and hardware requirements into executable engineering specifications and platform architectures
• Drive full product lifecycle execution. Lead designs through EVT, DVT, and PVT phases, including signal-integrity/power-integrity analysis, design reviews, and risk assessment, ensuring performance, reliability, and manufacturability
• Support manufacturing ramp and deployment. Collaborate with Operations, MFG, and Quality teams to scale from prototype to high-volume production, and support datacenter deployment with rapid issue triage and corrective action
• Provide technical leadership. Mentor engineers, establish best-practice workflows for schematic reviews, documentation, and validation, and lead complex root-cause debug across hardware, firmware, and system-integration domains

Requirements:

• Bachelor's or Master's in Electrical Engineering, Computer Engineering, or a related field
• 10+ years of hardware design experience, including board- and system-level engineering, with proven ownership of high-performance server or GPU/accelerator designs from concept through production
• Deep understanding of high-speed interfaces (PCIe Gen5/6, CXL, NVLink, Ethernet), power delivery net

• works, SI/PDN design, thermal considerations, and complex multi-board systems; demonstrated success leading EVT/DVT/PVT validation and manufacturing ramp

• Ability to architect and debug complex interactions across CPUs, GPUs, accelerators, system fabrics, firmware, and rack-level ecosystems
• Expert at working across multi-functional teams, influencing without authority, and representing engineering decisions to technical leaders and executives
• Direct experience with Hyperscalers or large cloud providers