Senior Mask Design Engineer – Hardware

Role Overview

• Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in groundbreaking sub-micron CMOS technologies using Cadence tools.
• Work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
• Take part in floor planning, custom layout and verifying against design rules and schematics.

Requirements

• Have a BSEE or equivalent experience.
• Minimum of 7+ years proven experience in Mask and Layout Design.
• Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
• Authority with Cadence custom circuit design tools
• particularly virtuoso.
• Experience running and debugging with verification tools such as Dracula, Hercules, Calibre, and Primeyield.
• Able to work optimally in a team, good interpersonal skills, passion and positive energy.
• Proficient in scripting languages like perl, python, skill etc.
• Knowledge of DRC and LVS checking flows, ability to customize decks.

Tech Stack

• Perl
• Python

Benefits

• eligible for equity and benefits