Design, develop and deliver circuit building block schematic, perform pre layout and post layout design optimization to meet design specification across PVT, process variation sensitivity analysis, aging, EOS, RV checks for design reliability
Work with custom layout team to define plan (floorplan, routing, matching, metal grid etc) to meet circuit performance
Collateral generation like circuit integration spec, and be a key driver to drive transition to AI tool-based design BMOD, timing model, power model, ICCT, IBIS, alpha numbers
Own specifications and design verification plans covering functionality, performance and reliability meeting high volume productization requirement
Collaborate with logic designer, logic verification designer, structural physical design engineers, integration engineers, signal integrity and power deliver engineer to define clear collateral handoff requirements to ensure efficient IP integration
Perform post silicon data analysis and debug and make necessary design enhancement to meet design specification
Conduct design reviews; actively contribute to design reviews
Represent the team on related IP in cross-functional meetings and co-ordination of deliverables
Work with external IP vendors as point of contact for analog designs

BSEE/MSEE/PhD in Electrical Engineering or equivalent with a minimum of 4+ years of experience in analog/mixed signal, high speed, or high voltage IO designs
Direct design experience with analog and mixed signal circuits like amplifiers, comparators, regulators, IO, PLL etc
Exposure to analog/mixed signal circuit design and layout flow and running post-layout simulations
Solid understanding of analog design trade-offs and design for process variation and reliability in modern CMOS technologies
Proficient in circuit design tools like Virtuoso, Spice, StarRC, Totem etc
Understanding of Verilog, static timing analysis, UPF and related aspects of mixed signal design

Analog Circuit Design Engineer

Key skills