About this role

Develop custom code and scripts to speed the process of set-up using Cadence tools, or developing software utilities that improve effectiveness of our processes.
Support PCB design efforts by assisting in Floorplanning and Stack-up decisions.
Partner with HW circuit design teams to analyze challenging High-Speed signal and power integrity problems to meet tight specifications.
Ensure no design escapes or problems during bring-up and Design Verification by organizing and executing high priority simulations.

BSEE or MSEE in Electrical Engineering or Electrical and Computer Engineering
Exposure to PCB Layout, Extraction and Analysis software like Cadence/Allegro, Ansys, Mentor Graphics/PADS or Keysight
Primary skills required in EM Fields, Transmission-Line Theory, Frequency and Time Domain Analysis
Above average skills needed in organization, planning, collaboration and communication
Must be proficient in Microsoft Office suite of tools [PowerPoint, Excel, Word]
Experience with MATLAB, Python, tcl, or similar tools/languages is a plus
Some experience/skills in taking lab measurements is also a plus but not required.

Signal and Power Integrity Hardware Engineer Intern

Key skills