Own the hardware architecture, microarchitecture, and successful delivery of complex ASICs from concept through tape-out and silicon bring-up.
Define system and chip-level architecture based on product requirements (throughput, latency, features, power, area, cost).
Translate system/network/software requirements into microarchitecture, block partitioning, interfaces, and verification strategy.
Architect high-performance datapaths, control planes, memory subsystems, and I/O (SerDes/PCIe/Ethernet/DDR/HBM) to meet PPA targets.
Mentor and grow engineering teams; promote architecture best practices and cross-discipline communication.
Balance technical decisions with schedule, risk and business priorities; present tradeoffs and roadmaps to stakeholders.

Bachelor's or master's degree in electrical engineering, Computer Engineering or related field
15+ years of ASIC design experience with progressive ownership of architecture/microarchitecture; proven record of tape-out(s).
Strong datapath and system architecture skills: packet pipelines or equivalent high-throughput streaming architectures, buffering, arbitration and QoS/scheduling.
Experience integrating high-speed SerDes/PHY, MAC/PCS, and external memory controllers (DDR/HBM) and familiarity with signal integrity/clocking issues.
Excellent cross-functional communication skills; ability to drive tradeoffs with product management, firmware, verification, PD and foundry teams.

Distinguished Technologist, ASIC Design Architect

Key skills