Develop FPGA/ASIC designs supporting design and/or verification teams
Implement FPGA/ASIC with latest design practices and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs)
Integrate DSP IP from Boeing’s algorithm team and third-party IP as needed
Perform static timing analysis, LEC, CDC, linting, and other necessary checks to ensure the design is completed on schedule
Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation
Create self-checking and reusable test benches from scratch, applying Object Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM to build agents consisting of drivers, sequencers, monitors, and use of predictors together with scoreboards for checking correctness
Support FPGA-based prototyping and validation depending on program and system requirements and complexity
Validate design through hardware integration test with special test equipment, test-beds, and higher-level systems as needed

Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement
Experience with ASIC/FPGA design or verification
Experience with ASIC/FPGA architectural definition, and detailed design implementation and functional verification using SystemVerilog with delivery/release of production designs
Experience with hardware-based integration and test of ASIC/FPGA designs

Associate ASIC/FPGA Design and Verification Engineer

Key skills