Key skills
PerlPythonC++C
About this role
Role Overview
- Develop and optimize standard cell templates in new process technologies.
- Explore standard cell design alternatives for power, performance and area tradeoffs (PPA).
- Improve library validation and release flow.
- Write scripts using Python, Perl, Cadence SKILL, and C++.
- Work with cross functional teams to continuously improve methodologies and efficiencies and drive efforts to resolution.
Requirements
- Hold a B.S or M.S. in Electrical Engineering (or equivalent experience) with 5 years industry experience.
- Have an in-depth understanding of mosfet device behavior, CMOS layout, and VLSI design.
- Experience working with standard cell design & layout.
- Great interpersonal skills.
- A passion for providing excellent support for end-users.
Tech Stack
- Perl
- Python
Benefits
- Eligible for equity and benefits