defining and leading the development of advanced packaging and 3DIC analysis flows for foundry and customer solutions
have expert knowledge of the Cadence toolset and/or equivalent competitor toolsets in the context of multiple flows including high-speed signal design, power design, signal integrity, power integrity and definition of electrical constraints
design experience and industry knowledge of one of Signal, Power, and Thermal analysis associated with IC, package, or PCB design
have the ability to analyze the customer's environment and evaluate appropriate solutions
be knowledgeable and aware of competitive technologies
anticipate technical issues and develop creative solutions before they become a problem
take technical lead on a wide range of projects
ability to understand high-speed, high-performance signal and power integrity-related issues and work with peers and other business groups
able to communicate effectively with Cadence R&D, Product Engineering, Marketing and with customers
understand customer success criteria and is committed to ensuring customer success

Bachelor’s degree (Masters preferred) in Electrical or Electronics Engineering
Minimum 15 years experience with Signal Integrity, Power Integrity, Electromagnetics, Thermal, and RF related to Package and PCB Design is required
5+ years experience with Cadence SI/PI tools Allegro platform tools including: Sigrity, Clarity, PCB Editor, ICP preferred
Strong knowledge of advanced packaging concepts
Strong knowledge of 2.5D, 3DIC and stacked die technologies
Understanding of chip level CMOS design concepts desired
Strong customer-facing communication and problem-solving skills
Strong personal drive for continuous learning and expanding professional skill sets
Excellent verbal and written communication skills

Senior Principal Solutions Engineer – 3DIC

Key skills