About this role

Develop logic designs and register transfer level (RTL) coding for SoC designs.
Integrate logic for IP blocks and subsystems into full-chip SoC or discrete component designs.
Define architecture and microarchitecture features for the block being designed.
Perform quality checks across RTL, timing, and power convergence aspects.
Optimize logic designs to meet power, performance, area, and timing objectives.
Review verification plans and implement corrective measures for failing RTL tests.
Apply secure development practices to address security threat models and objectives within the design.
Collaborate with IP providers to integrate and validate IPs at the SoC level.
Drive quality assurance compliance for seamless IP-SoC handoff.

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Proficiency in scripting languages such as Python, Perl, or similar programming languages.
Strong understanding of System Verilog and Verilog for RTL design.
Knowledge of digital design fundamentals and logic design principles.
Experience with hardware design and debugging microarchitecture/simulation.

SOC Logic Design Engineer

Key skills