Performs functional verification of CPU logic to ensure design will meet specification requirements.
Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to CPU microarchitecture specifications.
Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
Replicates, root causes, and debugs issues in the presilicon environment.
Finds and implements corrective measures to resolve failing tests.
Collaborates with CPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
Documents test plans and drive technical reviews of plans and proofs with design and architecture teams.
Maintains and improves existing functional verification infrastructure and methodology.

Bachelor's Degree in Electrical/Computer Engineering or any related field with 3+ years of relevant experience
3+ years of experience in Design Verification and Validation methodologies with UVM, System Verilog and industry standard EDA tools
3+ years of experience with Pre-silicon verification, SoC validation
Preferred: Experience in Scripting languages such as Python OR Perl
Proficiency with C/C++
Experience with RTL development using System verilog
Knowledge of system level boot flows and power management
Experience in Computer-Architecture familiarity
Experience in Power Management flows including low power entry/exit, frequency change flows etc.

Design Verification Engineer

Key skills