Mixed-Signal Behavioral Modeling Engineer

Role Overview

• Develop high-level behavioral models for analog and mixed-signal IP (ADCs, DACs, PLLs, LDOs, RF front-end blocks, biasing, amplifiers, etc.).
• Create abstracted models using Verilog, Verilog-AMS, or SystemVerilog.
• Develop regression infrastructure and mixed-signal testbenches enabling co-simulation (digital + analog).
• Integrate AMS models into digital verification environments (UVM-based).
• Define and build the mixed-signal verification methodology for top-level SoC and subsystem verification.
• Support architectural exploration through early-phase modeling and system-level simulations.
• Collaborate with analog/RF designers to capture real-world analog behaviors and map them into accurate behavioral abstractions.
• Work with digital and verification teams to ensure seamless integration of AMS models.
• Provide modeling and verification insights during architectural reviews, PDR/CDR, and silicon bring-up.
• Act as technical leader and subject-matter expert.

Requirements

• M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or related field.
• 2+ years of experience in analog/mixed-signal modeling and/or AMS verification.
• Hands-on experience with SystemVerilog, Verilog-AMS, wreal/RNM, or equivalent modeling languages.
• Strong understanding of analog/mixed-signal circuits (PLLs, LDOs, ADC/DACs, RF/IF paths, clocking, amplifiers).
• Experience with mixed-signal co-simulation environments (Cadence AMS Designer, Synopsys VCS AMS, or similar).

Benefits

• Base salary range for this role is $130,000 – $180,000 + equity in the company
• Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
• Comprehensive benefits package including paid time off, medical/dental/vision coverage, life insurance, paid parental leave, and many other perks