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Silicon Packaging Design Engineer at Intel Corporation | JobVerse
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Silicon Packaging Design Engineer
Intel Corporation
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Silicon Packaging Design Engineer
Phoenix, Arizona, United States of America
Full Time
2 weeks ago
$91,150 - $128,690 USD
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Key skills
Python
C
About this role
Role Overview
Drives end-to-end development for mask and panel design from concept through tape out
Implements physical layout and routing of the panel design
Performs panel substrate fit studies to establish design, performance, and cost tradeoffs
Conducts internal and external reviews, analyzes data, and resolves DRCs to optimize panel design
Completes documentation and collateral into the product lifecycle management system of record
Requirements
Bachelor’s degree in electrical engineering or related field
6+ months of relevant experience
Valor, Cadence APD, Siemens Xpedition, or CAD software
Troubleshoot a variety of physical design/layout issues
Prior experience with physical layout aspects of substrate design/layout
Performing panel routing starting day one
Strong analytical ability and problem-solving skills
Microelectronic package substrate technology development
Scripting using Python, VB, C, or other language
Tech Stack
Python
Benefits
competitive pay
stock bonuses
health
retirement
vacation
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