CPU Power Optimization Engineer
Austin, Texas, United States of America
Full Time
2 weeks ago
$141,910 - $200,340 USD
Visa Sponsor
Key skills
Collaboration
About this role
Role Overview
- Drive power optimization efforts across architecture and RTL
- Identify opportunities to reduce dynamic and leakage power
- Propose and guide implementation of low-power RTL changes
- Conduct feature
- and workload-based power analysis
- Close gaps between measured and targeted power on CPUs in development
- Develop and enhance power analysis and optimization methodologies
- Collaborate with architecture and RTL owners to deliver measurable results
- Provide recommendations for future CPU power architecture
Requirements
- Bachelor's degree in electrical/computer engineering, computer science or related field
- 4+ years of experience with a Bachelor's degree
- 3+ years of experience with a Master's degree
- 1+ years of experience with a PhD
- Low-power CPU design
- Dynamic and leakage power estimation and reduction at architecture, RTL, block synthesis, or circuit level
- RTL design and RTL-level power optimization strategies
- Proficiency with industry-standard power estimation tools
- Scripting/automation skills
- Good understanding of CPU architecture and SoC-level power behavior
- Experience driving RTL-level power optimization in collaboration with design teams
- Familiarity with Intel CPU architectures (strong plus)
Benefits
- competitive pay
- stock bonuses
- benefit programs which include health
- retirement
- vacation