Logic Design Engineer

Role Overview

• Participate in design development tasks throughout the IP development flow.
• Develops the logic design, register transfer level (RTL) coding, and simulation for an IP.
• Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs.
• Applies various strategies, tools, and methods to write RTL and optimize the logic to quality the design to meet the IP release requirement.
• Involve in design example creation, simulation example creation, IP integration and release process.
• Involve in IP design example brings up on hardware, hardware verification and failure debugging.

Requirements

• 3+ Years experience
• Bachelor's or master's degree in electrical engineering, Computer Engineering, or a related field
• Experience in System Verilog, VCS/Synopsys simulators, Lint and Synthesis
• Experience in programming with C/C++/Perl/Python/TCL/Unix Shell script
• Experience in FPGA design and programming is a plus
• Experience in RTL validation is a plus.
• Ability to work with different teams, good communication and problem-solving skills.

Tech Stack

• Perl
• Python
• Unix

Benefits

• Health insurance
• 401(k) matching
• Paid time off