Participate in all phases of project, to produce detailed design documentation, verification plans and reports
The design and development of all custom digital devices (ASIC or FPGA), to support RR electronic engine control units
The verification of complex products that use FPGAs and/or ASICs to DO-254
Develop RTL utilizing a hardware description language (e.g. VHDL, Verilog, and/or SystemVerilog) and debug the design via simulation tools
Expertise achieving timing closure on FPGA designs and generating test benches
Evaluate the process flow including but not limited to high level design, synthesis, place and route, timing constraints and power utilization

Bachelor's degree in Electronics Engineering and/or Computer Engineering with 5+ years of experience, OR Master's degree in Electronics Engineering and/or Computer Engineering with 3+ years of experience, OR PhD in Electronics Engineering and/or Computer Engineering
In order to be considered for this role, you must be a U.S. Citizen
Validate the FPGA hardware in the lab using test equipment (oscilloscopes, logic analyzers) and debug tools (e.g ILA, JTAG)
Experience in scripting with languages such as TCL, Python, Shell scripts
Able to work with Windows and Linux development environment
Demonstrable experience in version control, such as Git, SVN
Experience of Actel & Xilinx tool flows to implement complete designs
Development of model-based systems with digital engineering toolsets (MATLAB, Simulink and/or similar)
Knowledge of systems engineering, and robust design tools and techniques coupled with the latest model-centric development approaches
Experience with Cameo Systems Modeler (MagicDraw) or similar SysML modelling software

health, dental, vision, disability, life and accidental death & dismemberment insurance
flexible spending account
health savings account
a 401(k) retirement savings plan with a company match
Employee Assistance Program
Paid Time Off
certain paid holidays
paid parental and family care leave
tuition reimbursement
long-term incentive plan

Principal Engineer – FPGA/ASIC Design

Key skills