Senior Verification Engineer – ARM Fabric Unit Level

Role Overview

• Develop UVM-based verification test benches and methodologies
• Verify ARM architecture based distributed fabric needed to transport control, sidebands and data
• Drive aspects of verification for the unit
• Architect testbenches and craft verification environment using SV and UVM
• Define test plans, tests and verification infrastructure for modules, clusters and systems
• Build efficient and reusable bus functional models, monitors, checkers, and scoreboards
• Implement functional coverage and coordinate the verification closure process for the unit
• Work with architects, designers, FPGA, and post-silicon teams

Requirements

• BTech or MTech in ECE, EE, CSE, or equivalent degree
• 4+ years of demonstrated ability in verification closure of complex units
• Proven experience in ARM architecture and protocols (AXI, AHB, APB)
• Experience in the latest verification methodologies like SV and UVM
• Good debugging and analytical skills with exposure to industry-standard verification tools for simulation and debug
• Good interpersonal skills, ability to work as a diligent teammate

Benefits

• Health insurance
• 401(k) matching
• Flexible work hours
• Paid time off
• Remote work options