Key skills
C++CProblem Solving
About this role
Role Overview
- Understand the design & implementation with focus on Memory Management unit
- Define the verification scope
- Develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors)
- Implement test/coverage plans
- Verify the correctness of the design
- Collaborate with architects, designers, software engineers across sites
- Plan and work on strategic direction of the methodology for the testbench
Requirements
- Bachelors or Masters Degree in Electrical Engineering, Computer Science, or Computer Engineering
- Exposure to Computer Architecture, ASIC design and verification methodology
- Strong ability with SystemVerilog, C and/or C++, test planning, coverage closure, and creating reusable verification components
- Knowledgeable in constrained random testing with functional coverage and assertion-based verification
- Understanding of object-oriented programming concepts
- Exposure to simulation tools like VCS, IES and debug tools like Debussy, GDB
- Strong interpersonal skills
- Good debugging and problem solving skills
Benefits
- equity
- benefits