Collaborate with cross-functional teams to drive package designs that meets Cirrus performance, reliability, and manufacturability requirements
Define package requirements from electrical, thermal, and mechanical point of view in close cooperation with Design and layout teams
Utilize AutoCAD, GDS tools, Siemen Fast3D and Cadence SiP Layout tool to complete physical design, electrical simulation and manufacturing validation solution for package design, including die bump array/BGA integration refinement using die information
Drive continuous improvement processes to assure accuracy between the interface of the package to the die and PCB
Work with cross functional teams (Customer, Designers, OSATs) to establish and maintain design rules for WLCSP, wire bond, and other packages
Understand DFM checking and modification to improve assembly yield and prevent manufacturing issues
Grow and promote automation processes throughout the package design flow
Develop test vehicles that properly assess bump placement, PCB proximity effects, WLCSP RDL stack up and the like on final chip performance
Close collaboration with customers to resolve various design issues between the piece part and PCB
Requirements
BS or above in Mechanical, Electrical, Chemical, or Materials Engineering
Demonstrable experience in a packaging-related field
Experienced Cadence SiP layout user
Strong AutoCAD user
Knowledge of packaging technologies, materials, package substrate design and assembly rules
Understanding of electrical simulation results on a package design
Familiarity or willingness to learn Cadence Virtuoso operation using Unix workstations
Strong written and verbal communication skills; able to review technical ideas with customers and high-level management
Self-starter with a strong sense of ownership and accountability for driving projects to completion
Ability to build strong, influential relationships in a collaborative environment within a diverse setting